Silicon IP
S2Cは、FPGAプロトタイプの為に、様々なIPベンダー様と協調してビジネスを展開しています。 また、S2Cは特許を取得している独自の技術（TAI-IP)により、IPを暗号化して配布することにより お客様はライセンスを購入する前に、十分な評価を行うことが可能となっています。 S2Cの技術と、パートナーとの協調により、お客様は効率よく最適なIPを選択することが 可能となります。

※こちらの製品は日本代理店では取り扱っておりません。 S2Cサイト（英文） をご覧ください。

Multi-Format HD Video Decoder

Equipped with a fully dedicated DMA tuned to handle high-speed video data, the MFHDVDE is a video IP solution targeting SoC and ASIC-based applications including HD-DVD players, HD set top boxes, and IPTV appliances.

USB-OTG

The USBHS-OTG core implements a hi-speed USB port that can serve as either a host or a peripheral when connected to other USB devices. It features an integrated direct memory access (DMA) controller for efficient, autonomous data transfer, and can support USB hubs and multiple peripheral devices in host mode.

PIP-AMBA Platform IP

The PIP-AMBA Platform IP provides the essential IP cores and infrastructure software needed for systems using a microprocessor from the ARM 7 or 9 families with the AMBA bus. The platform is well suited to a variety of AMBA-based SoC designs. It includes the multi-master and arbitration features of the high-performance AHB bus, and a bridge to the slower APB peripherals bus.

R8051XC2

Developed for ASIC or FPGA system-on-chip designs, the new 8051 core has a single-clock architecture that uses an average of 2.12 cycles per instruction. This high-speed performance also reduces power consumption: using fewer cycles for the same operation makes a 90 nm ASIC implementation of the new core 10% more efficient than CAST's previously best 8051.

802.11 MAC & PHY

The WLAN IPs enable customers to integrate the WiFi function into their own chips. This series of IPs, licensed to over ten customers across North America, Europe and Japan, includes optimized high performance IEEE 802.11b, 802.11a, 802.11g Physical Layers (PHYs) and 802.11 MAC. The PHYs are offered as synthesizable HDL cores, and MAC is a combination of synthesizable HDL core and C based firmware core.